1. Field of the Invention
The present invention relates to a method of forming a silicon oxycarbonitride film.
2. Description of the Related Art
Accompanying the miniaturization of semiconductor integrated circuit devices from 3X nm-node to 2X nm-node, and from 2X nm-node to further, a parasitic capacitance around a gate electrode has become considerable. A side wall insulating film is formed around the gate electrode. There are some kinds of side wall insulating films, such as a stress liner, an offset spacer, a side wall spacer, and the like, and a silicon nitride film (SiN film) is used mostly as the side wall insulating film. A silicon nitride film has a relative dielectric constant that is higher than that of a silicon oxide film (SiO2 film). Thus, it is required to form a side wall insulating film having a low dielectric constant, in particular, to replace it with an insulating film having a relative dielectric constant that is equal to or less than that of a silicon nitride film.
In order to obtain the side wall insulating film having a low dielectric constant, a few insulating films have been researched, one of which is a silicon oxycarbonitride (SiOCN film). For example, Patent reference 1 discloses a silicon oxycarbonitride film.
Although Patent Reference 1 discloses a method of forming a silicon oxycarbonitride film, there is no disclosure about applying the silicon oxycarbonitride film as a side wall insulating film.
The side wall insulating film is formed around a gate electrode by processing an insulating film using an anisotropic dry etching method, such as a reactive-ion etching (RIE) method. The side wall insulating film is exposed to various etching processes during the manufacturing of a semiconductor integrated circuit device.
For example, when applying a salicide process to a gate electrode, a source diffusion layer, and a drain diffusion layer, the side wall insulating film is exposed to a wet etching process after performing dry etching before forming a metal layer. After that, when removing a non-reacted portion of the metal layer, the side wall insulating film is exposed to a dry etching or a wet etching.
In addition, in a case where a self-aligning contact technique is used, the side wall insulating film is exposed to an anisotropic dry etching process such as an RIE method when forming a contact hole as an interlayer insulation film.
As described above, since an insulating film used as the side wall insulating film has to be processed on the side wall, excellent workability, as well as a dry etching resistance or a wet etching resistance, are necessary.
3. Prior Art Reference
(Patent Reference 1) Japanese Laid-open Patent Publication No. 2011-192875